0 comments Wednesday, January 26, 2011

XMOS Bit Scheme will presented at FOSDEM 2011.

The presentation takes place February 5th at 14h00 and is titled "Advanced Experiments with XMOS Multicore Embedded Hardware."

Embedded systems handle signals from the outside world using either polling or interrupts. While polling is resource consuming, interrupt-driven approaches can introduce bugs which are subtle and difficult to debug. This talk discusses our experience on porting the Scheme programming language to a new event-driven architecture and programming style developed by the XMOS company. The architecture's hardware support for multithreading enables an event-driven style for programming embedded systems which does not suffer from the drawbacks associated with the use of polling and interrupts. To accomplish this, the thread support is implemented in hardware. Each thread has a dedicated set of registers and is assigned a guaranteed amount of CPU cycles. We first describe how we ported a Scheme interpreter to this new architecture. We exploit the multi-threaded nature of this architecture by running multiple interpreters in parallel, concretely one interpreter on each core. In addition, we extended each interpreter with abstractions to manage this concurrency and to exploit features specific of the XMOS hardware. Such abstractions include sending messages between interpreters over channels. Concretely, our effort enables an event-driven style for programming multi-core embedded systems in Scheme. We show how the XMOS architecture helps the programming in overcoming the difficulties associated with polling and interrupt-driven approaches.